VPN new one without halt.

A qualitative analysis is presented to compare the data transfer efficiency of thetwo system topologies, assuming there are four identical crypto engines in eachsystem. The former system has 4 cryptochannels and a 32-bit bidirectional bus,whereas the optimised one has 2 C/WDMAs and 2 RDMAs as well as dual one-way64-bit data buses, hence DMA/bus transfer time in the optimised system is half ofthat in the former system under the same clock frequency. Now five data packets arerequesting the service supplied by the crypto engines. Define data transfertime ¼ 2 6 (PCI transfer time þ DMA/bus transfer time). Considering therelationship of data processing time and data transfer time, we illustrate threetypical examples in Figure 3. In Figure 3a, the data processing time is shorter thanthe data transfer time in the former system. With the system level pipelineimprovement, the PCI interface works consecutively from packet to packet in theoptimised system; however, in the former system, the PCI interface cannotcommence the next data transfer until the current data are transferred to the cryptoengine by the cryptochannel. With the dual one-way buses, the fifth data packetinput has been finished by the end of the first packet processing so that the firstcrypto engine can process the new one without halt. On the contrary, in the formersystem, the fifth data packet cannot be input until the first cryptochannel is releasedwhen the first data packet has been exported. This situation can be seen in bothFigure 3b and 3c, in which the data processing time is longer than the data transfertime. An obvious performance improvement can be found in all these three figures.Since the crypto engines are all the same, the proposed system topology improves thedata transfer efficiency significantly. Note that not only the double data bus width,but also the implementation of the dual one-way pipelined data transfer paths as wellas the independent DMA arrays make contributions to the improvement. Meanwhile, the amelioration of the data transfer efficiency drops when the data processingtime increases. Hence, the crypto engine design and the integration of theheterogeneous crypto engine arrays are critical to a high performance NSP.